|
These are octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical, active-low output-control (G)\ inputs, and complementary output-control (G and G\) inputs. These devices feature high fan-out, improved fan-in, and 400-mV noise margin. The 74LS240 devices can be used to drive terminated lines down to 133 . 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Hysteresis at Inputs Improves Noise Margins (this posting is the responsibility of the poster) |
S_French@dfwind.com (Sheena French) for more information. All emails will be forwarded to the poster's actual email address.